This invention relates to a process for delineating patterns of native oxides of Group III-V compound semiconductors.
The usefulness of native oxides in the fabrication of some Group III-V compound (e.g., AlGaAs) semiconductor device structures has in the past been limited by the rapid etching of these oxides during wet chemical procedures (i.e., in the presence of acids and bases). As a consequence, device structures which require a delineated, retained native oxide can be fabricated only if the photoresist or masking material can be removed with organic solvents which do not etch the native oxide. Although these native oxides can be stabilized against chemical attack, this stabilization procedure requires high temperatures (&gt;600 degrees C.) which are above the allowed temperature range for some device structures. Thus, the well-developed, good dielectric masks such as Si.sub.3 N.sub.4, SiO.sub.2, and Al.sub.2 O.sub.3 cannot be used without exposing the devices to the high temperatures needed to stabilize the native oxides. In addition, many device structures cannot tolerate etching of the host semiconductor during the mask removal process (e.g., a mask over the zinc skin-diffused contacting area of AlGaAs mesa lasers can be removed only with an etch selective to the mask material alone). These problems pose severe limitations on the use of the native oxides of Group III-V compounds as incorporated parts of device structures.